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ADRs tagged speed

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18 ADR(s) carry this tag.

ID Title
ADR-0559 Feature Coverage Audit — Add speed_chroma + speed_temporal to Extraction Scripts (HDR-model prep)
ADR-0567 Real On-Device GPU Kernels for speed_chroma and speed_temporal (4 Backends)
ADR-0852 Wire speed_chroma_hip and speed_temporal_hip into HIP Build and Dispatch
ADR-0964 Implement speed_internal.c and wire speed_{chroma,temporal}_{hip,sycl}
ADR-0965 CUDA SpEED TU repair — align with current CudaFunctions table (closes T-CUDA-SPEED-TU-REPAIR-2026-05-31)
ADR-1146 SPEED and CAMBI Feature Rework to Fork Standards (Bit-Exact)
ADR-1179 Fix Intel Arc SYCL Crashes and Default Model Resolution Divergence
ADR-1237 CAMBI Anti-Dithering AVX2 Vectorization, SpEED SIMD QR Dispatch, and Threaded GPU Flush Alignment
ADR-1301 A non-finite SpEED score fails the frame instead of being published
ADR-1358 The SYCL SpEED twins are device-resident, with the 25x25 linear algebra on the device and exact fp32 arithmetic
ADR-1380 The CUDA SpEED twins are device-resident, with the 25x25 linear algebra on the device and CPU-exact fp32 arithmetic
ADR-1384 Run the HIP SpEED twins entirely on the device, in the CPU's fp32 arithmetic
ADR-1430 speed_chroma_cuda keeps its correctly rounded log2; the gate bounds what glibc's log2f adds
ADR-1452 the gate bounds speed_chroma_hip against the CPU by what glibc's log2f adds, as it does for the CUDA twin
ADR-1459 SpEED's covariance kernels return the scalar kernel's bits; they vectorise across sums, not within one
ADR-1477 SpEED evaluates Netflix's fp64 expressions again, and its GPU twins form the entropies and the score on the host with the same statements, so every twin returns the CPU's scores bit for bit on any C library
ADR-1480 speed_temporal sizes its frame buffers for the prescaled height; upstream sizes them for the source height and reads past them when speed_prescale is above 1
ADR-1794 Bilinear column tables without a width limit