ADRs tagged psnr-hvs¶
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9 ADR(s) carry this tag.
| ID | Title |
|---|---|
| ADR-0159 | psnr_hvs AVX2 port — bit-exact DCT vectorization (T3-5) |
| ADR-0160 | psnr_hvs NEON port — bit-exact DCT vectorization (T3-5-neon) |
| ADR-0350 | psnr_hvs AVX-512 — re-bench confirms AVX2 ceiling (T3-9 (a)) |
| ADR-0585 | Add enable_chroma option to psnr_hvs_vulkan |
| ADR-1369 | SYCL twins read the planes the state uploads once per frame; opt-in shared chroma planes and a device-side slot fence |
| ADR-1397 | GPU psnr_hvs twins reproduce the CPU's running float sum bit for bit |
| ADR-1401 | psnr_hvs_sycl and psnr_hvs_hip return the CPU's scores bit for bit; the fp64-free masking threshold is an integer square root |
| ADR-1469 | the psnr_hvs SIMD butterfly is two functions, cut at the same statement in the AVX2 and the NEON twin |
| ADR-1488 | the psnr_hvs masking threshold is the double root of a float product, as Netflix's source writes it; the double product of PR #552 is removed and the AVX2, NEON, CUDA, HIP and SYCL forms follow, bit for bit |