ADRs tagged feature-extractor¶
Auto-generated by scripts/docs/generate-adr-by-tag.sh. Edit ADR Tags: lines to update.
90 ADR(s) carry this tag.
| ID | Title |
|---|---|
| ADR-0126 | SSIMULACRA 2 perceptual metric as a fork-local feature extractor |
| ADR-0130 | SSIMULACRA 2 scalar implementation |
| ADR-0177 | Vulkan motion kernel + motion cross-backend gate |
| ADR-0178 | Vulkan ADM kernel (T5-1c-adm) |
| ADR-0179 | float_moment SIMD parity (AVX2 + NEON) |
| ADR-0182 | GPU long-tail batch 1 — psnr + ciede + moment on CUDA / SYCL / Vulkan |
| ADR-0187 | ciede2000 Vulkan kernel — float-precision per-pixel ΔE |
| ADR-0188 | GPU long-tail batch 2 — psnr_hvs / ssim / ms_ssim across CUDA / SYCL / Vulkan |
| ADR-0189 | float_ssim Vulkan kernel — host decimation, 2-dispatch GPU |
| ADR-0190 | float_ms_ssim Vulkan kernel — 5-level pyramid + Wang product on host |
| ADR-0191 | float_psnr_hvs Vulkan kernel — overlapping 8×8 DCT blocks + per-plane log transform |
| ADR-0192 | GPU long-tail batch 3 — closing every remaining metric gap (motion_v2 / float_ansnr / ssimulacra2 / cambi + float twins) |
| ADR-0193 | motion_v2 Vulkan kernel — single-dispatch SAD via convolution linearity |
| ADR-0194 | float_ansnr GPU kernels — single-dispatch 3x3 + 5x5 filters with per-WG float partials |
| ADR-0195 | float_psnr GPU kernels — single-dispatch diff² with float partials, bit-exact vs CPU |
| ADR-0196 | float_motion GPU kernels — float twin of integer_motion blur+SAD |
| ADR-0197 | float_vif GPU kernels — 4-scale pyramid with mirror-asymmetry fix |
| ADR-0199 | float_adm Vulkan kernel — sixth Group B float twin |
| ADR-0202 | float_adm CUDA + SYCL twins — sixth Group B float kernel finishes |
| ADR-0210 | cambi Vulkan integration (Strategy II hybrid) |
| ADR-0215 | FastDVDnet temporal pre-filter — 5-frame window, placeholder weights |
| ADR-0216 | Vulkan PSNR — chroma extension (psnr_cb / psnr_cr) |
| ADR-0218 | MobileSal saliency feature extractor (T6-2a) |
| ADR-0219 | motion3 GPU coverage on Vulkan + CUDA + SYCL (3-frame window) |
| ADR-0223 | 0223-transnet-v2-shot-detector.md |
| ADR-0253 | Defer SpEED-QA full-reference reduction |
| ADR-0255 | FastDVDnet temporal pre-filter — real upstream weights via luma adapter (T6-7b) |
| ADR-0261 | TransNet V2 shot-boundary detector — real upstream weights via NTCHW adapter (T6-3a-followup) |
| ADR-0266 | HIP fifth kernel-template consumer — float_ansnr_hip |
| ADR-0267 | HIP sixth kernel-template consumer — motion_v2_hip |
| ADR-0273 | HIP seventh kernel-template consumer — float_motion_hip |
| ADR-0274 | HIP eighth kernel-template consumer — float_ssim_hip |
| ADR-0337 | motion_v2 inherits motion v1's public option surface (duplicate registration) |
| ADR-0351 | CUDA PSNR — chroma extension (psnr_cb / psnr_cr) |
| ADR-0360 | CAMBI CUDA port (Strategy II hybrid, T3-15a) |
| ADR-0375 | HIP batch-3 — float_moment_hip and float_ssim_hip real kernels |
| ADR-0377 | HIP batch-4 — ciede_hip and integer_motion_v2_hip real kernels |
| ADR-0378 | Per-picture CUDA streams must use CU_STREAM_NON_BLOCKING |
| ADR-0385 | Feature-extractor deduplication by provided-feature names |
| ADR-0415 | CAMBI SYCL port — closes last CUDA-to-SYCL parity gap |
| ADR-0447 | Motion features under-report on HFR / 50p content |
| ADR-0468 | HIP float_adm real kernel (ninth HIP consumer) |
| ADR-0523 | Register vmaf_fex_integer_motion_hip in the extractor list |
| ADR-0530 | HIP feature-extractor flag promotion and HIP_DEVICE picture-buffer type |
| ADR-0533 | Full HIP feature-extractor registration sweep |
| ADR-0580 | float_ansnr enable_chroma option |
| ADR-0586 | Introduce integer_adm_vulkan.c as canonical Vulkan integer ADM extractor |
| ADR-0645 | Thread integer ADM p-norm through SIMD callbacks |
| ADR-0662 | Vulkan Motion Lavapipe Parity |
| ADR-0707 | TAD — Temporal Absolute Difference Feature Extractor Implemented in Rust (cbindgen Pilot) |
| ADR-0795 | Clarify and harden VmafFeatureExtractor.prev_ref thread-safety invariant |
| ADR-0865 | Sunset ANSNR — drop ansnr / float_ansnr feature extractors |
| ADR-0964 | Implement speed_internal.c and wire speed_{chroma,temporal}_{hip,sycl} |
| ADR-0965 | CUDA SpEED TU repair — align with current CudaFunctions table (closes T-CUDA-SPEED-TU-REPAIR-2026-05-31) |
| ADR-0989 | Wire motion_add_uv through integer_motion_sycl; emit warning on motion_five_frame_window |
| ADR-1100 | Skip GPU-flagged extractors when flags == 0 in vmaf_get_feature_extractor_by_feature_name |
| ADR-1107 | Per-extractor prev_ref in the threaded batch path (multi-PREV_REF starvation fix) |
| ADR-1110 | Add ΔE-ITP (Delta E ITP) — PQ-only HDR colour-difference CPU extractor |
| ADR-1111 | Add PU21 HDR perceptual metric (PU-PSNR + PU-SSIM, PQ input only) |
| ADR-1112 | NIQE no-reference CPU feature extractor (fork-pkl parity) |
| ADR-1114 | Y-FUNQUE+ wavelet-domain atom features (atoms-only, fused SVR deferred) |
| ADR-1115 | BRISQUE no-reference CPU feature extractor (bundled LIVE model) |
| ADR-1202 | GPU SpEED-chroma twins report singularity separately from failure |
| ADR-1203 | psnr_hvs_cuda defaults enable_chroma to true, matching every other backend |
| ADR-1204 | GPU ADM contrast-masking twins clamp the far edge instead of mirroring it |
| ADR-1205 | The ssimulacra2 FMA unification extends to the scalar fallback and every GPU host copy |
| ADR-1208 | The ssimulacra2 edge-diff SIMD loops take their difference in double |
| ADR-1210 | The SYCL integer-ADM contrast-masking kernel mirrors its near edge |
| ADR-1211 | integer_adm_hip stages the luma plane onto the device before launching |
| ADR-1212 | The GPU float_moment twins normalise by the bit-depth scaler on the host |
| ADR-1213 | ciede_hip sizes its chroma staging with the picture's ceil dimensions |
| ADR-1214 | The float-ADM GPU twins ignore adm_csf_scale in Watson mode and share the CPU's option aliases |
| ADR-1215 | The 16-bpc CUDA PSNR kernel takes the plane index the host has always passed |
| ADR-1216 | The GPU motion3 twins apply motion_fps_weight exactly once |
| ADR-1217 | The GPU float-VIF kernels read vif_sigma_nsq and vif_enhn_gain_limit from their options |
| ADR-1218 | The GPU SpEED twins zero the device solution and report singularity from the temporal path |
| ADR-1219 | The HIP and Metal CAMBI twins use the shared TVI bisection and the CPU's border rules |
| ADR-1220 | The GPU float-ADM kernels honour adm_p_norm, adm_bypass_cm and adm_skip_scale0 |
| ADR-1221 | clip_db is a ceiling on the MS-SSIM dB output, not a clamp on the linear score |
| ADR-1299 | Compute MS-SSIM chroma on SYCL |
| ADR-1365 | SYCL PSNR, SSIM and float-motion twins take the CPU option tables |
| ADR-1373 | CUDA PSNR, SSIM and motion twins take the CPU option tables and the CPU's arithmetic |
| ADR-1382 | HIP PSNR, SSIM and float-motion twins take the CPU option tables |
| ADR-1400 | integer_ssim_hip sums small frames in the CPU's raster order |
| ADR-1404 | float_motion_hip emits motion3 and implements every CPU float_motion option on the device |
| ADR-1478 | Port motion_five_frame_window from Netflix; the deferral of ADR-0337 ends for this option |
| ADR-1713 | Rust feature-extractor twins behind the unchanged C ABI (RC4 framework) |
| ADR-1836 | vif_cuda names its scores after enable_chroma when the caller sets it |
| ADR-2056 | float_adm files its debug ratio unsuffixed; a second debug instance is refused |
| ADR-2090 | Derive motion2 / motion3 frame by frame: final once the frame after is scored, the same statements as the flush |