ADRs tagged aarch64¶
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4 ADR(s) carry this tag.
| ID | Title |
|---|---|
| ADR-0160 | psnr_hvs NEON port — bit-exact DCT vectorization (T3-5-neon) |
| ADR-1461 | no C or C++ translation unit is built with floating-point contraction; the strict policy is a project argument |
| ADR-1561 | integer VIF converts its residual variance through vif_sv_sq(), which returns x86's value without the undefined double to int32_t conversion |
| ADR-1601 | integer VIF forms the denominator log argument sigma_nsq + sigma1_sq in uint32_t |